Is DDR5-4800 CL40 memory good? Nanosecond latency and JEDEC specs explained

DDR5-4800 CL40 is the JEDEC baseline spec every Intel 12th-gen, 13th-gen, and early AMD AM5 platform validates against. Its 16.67 ns first-word latency is actually slightly worse than a tight DDR4-3600 kit on paper, which is why early DDR5 adopters often didn't see an immediate performance jump in latency-sensitive workloads.

First-word latency

16.67 ns

CL40 @ 2400 MHz bus

Row cycle time (tRC)

48.8 ns

tRP + tRAS

Peak bandwidth

38.4 GB/s

Per channel

Preset

Data rate

MT/s

CL (tCL)

clk

tRCD

clk

tRP

clk

tRAS

clk

Timings are in memory clock cycles. True latency in nanoseconds is derived from the data rate.

True Latency

First-word latency (CL)

16.67 ns

Time from a read command to the first bit of data arriving.

I/O bus clock

2400 MHz

Cycle time

0.417 ns

tRCD delay

16.67 ns

tRP delay

16.67 ns

tRAS

32.08 ns

tRC (tRP + tRAS)

48.75 ns

Peak bandwidth per channel38.4 GB/s

Assumes one 64-bit channel. Dual channel doubles this, quad channel quadruples it.

How this is calculated

At a 2400 MHz bus clock, each cycle is about 0.417 ns, so 40 cycles of CAS latency lands on 16.67 ns. Row cycle time (tRC = tRP + tRAS) comes in around 48.75 ns. Bandwidth is the real headline: 38.4 GB/s per channel means a dual-channel kit delivers 76.8 GB/s of peak memory bandwidth, roughly 50% more than a DDR4-3200 dual-channel setup.

Verdict

DDR5-4800 CL40 is DDR5's entry point, higher bandwidth than DDR4 but worse raw latency. Useful as a price-performance floor on a new build and an easy XMP target to overclock past.