DDR5-4800 CL40 first-word latency is 16.7 ns
DDR5-4800 CL40 is the JEDEC baseline spec every Intel 12th-gen, 13th-gen, and early AMD AM5 platform validates against. Its 16.67 ns first-word latency is actually slightly worse than a tight DDR4-3600 kit on paper, which is why early DDR5 adopters often didn't see an immediate performance jump in latency-sensitive workloads.
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RAM Latency Calculator
Timings are in memory clock cycles. True latency in nanoseconds is derived from the data rate.
True Latency
First-word latency (CL)
16.67 ns
Time from a read command to the first bit of data arriving.
I/O bus clock
2400 MHz
Cycle time
0.417 ns
tRCD delay
16.67 ns
tRP delay
16.67 ns
tRAS
32.08 ns
tRC (tRP + tRAS)
48.75 ns
Assumes one 64-bit channel. Dual channel doubles this, quad channel quadruples it.
How this is calculated
At a 2400 MHz bus clock, each cycle is about 0.417 ns — so 40 cycles of CAS latency lands on 16.67 ns. Row cycle time (tRC = tRP + tRAS) comes in around 48.75 ns. Bandwidth is the real headline: 38.4 GB/s per channel means a dual-channel kit delivers 76.8 GB/s of peak memory bandwidth, roughly 50% more than a DDR4-3200 dual-channel setup.
Verdict
DDR5-4800 CL40 is DDR5's entry point — higher bandwidth than DDR4 but worse raw latency. Useful as a price-performance floor on a new build and an easy XMP target to overclock past.
More DDR5 scenarios
Frequently asked questions
What's the true latency of DDR5-6000 CL30?
How do CL and MHz affect RAM speed?
Is DDR5-6000 CL30 better than DDR4-3600 CL16?
What are tRCD, tRP, and tRAS?
Does faster RAM help gaming?
What is JEDEC vs XMP/EXPO?
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