Memory latency numbers every programmer should know: L1 to HDD in nanoseconds

Computer memory spans 7 orders of magnitude in latency: from L1 cache at roughly 1 nanosecond to spinning HDD at roughly 10 milliseconds. Each step up the hierarchy is roughly 10-100x slower than the step below it. These numbers aren't academic. They explain why your program is slow and what to do about it.

Hardware tier
Fundamentals
Memory hierarchy fundamentals
Topic focus
Memory latency numbers
latency-numbers

How this is calculated

The rough latency numbers for a modern desktop CPU (2026): L1 cache ~1 ns (3-5 cycles at 4 GHz). L2 cache ~3-4 ns (12-16 cycles). L3 cache ~10-15 ns (40-60 cycles). DDR5 RAM ~50-80 ns (200-320 cycles). NVMe SSD ~50-100 µs (50,000-100,000 ns). SATA SSD ~100-200 µs. HDD ~5-15 ms (5,000,000-15,000,000 ns). To put this in human terms: if L1 cache access were 1 second, RAM access would be almost 1.5 minutes. An HDD access would be over 4 months. This is why caching works, why SSDs transformed computing, and why in-memory databases are fast.

Verdict

Every programmer should know these numbers. They're the difference between code that works and code that's fast. Keep your data as close to the CPU as possible, avoid random memory access on large datasets, and never read from disk in a hot path.

More Latency scenarios

Frequently asked questions

How much faster is L1 cache than RAM?
Roughly 40-60x faster for random access. L1 cache access is about 1 ns; DDR5 RAM is about 50-80 ns end-to-end including controller overhead. That's why keeping hot data in cache dominates real-world CPU performance.
Is NVMe SSD faster than RAM?
No. NVMe is fast for storage, but for random access its latency is around 50-150 µs versus RAM's 50-80 ns. That's a 1,000x gap. NVMe beats RAM only on raw capacity and persistence, never on latency.
Why is HDD so much slower than SSD?
A spinning HDD has to physically move a read head to the right track and wait for the platter to rotate into position, typically 5-15 ms per random access. An SSD has no moving parts and returns data in under 100 µs, roughly 100x faster for random reads.
What's the point of L3 cache?
L1 and L2 are tiny (KB to low MB) and per-core. L3 is much larger (tens of MB) and shared across cores, acting as a buffer before requests go to main RAM. It catches data evicted from L1/L2 and data shared between cores.
How many nanoseconds is one CPU cycle?
At 4 GHz, one cycle is 0.25 ns. At 5 GHz, 0.2 ns. Cache hits are measured in single-digit cycles; main memory access costs hundreds of cycles, which is why optimizing for cache locality matters enormously in performance-critical code.
Does DDR5 have lower latency than DDR4?
Not usually at the same relative tier. DDR5 improved bandwidth and capacity significantly, but true latency (in ns) for mainstream kits is similar to late-stage DDR4. The gains from DDR5 come from bandwidth and larger capacities, not lower memory latency.